分享

ARM的Big－Little Computing的意思是大流氓（Cortex－A15）带着小跟班（Cortex－A7）一起玩为了省电的非对称作战。NVIDIA方面在其Tegra3上也整了个4＋1的“非对称的SMP计算”[Variable Symmetric Multiprocessing (vSMP)]（还整了个专利。可见专利或者文章有多恶心）。但与ARM的Big－Little最大区别是：大家都是一样的流氓－Cortex－A9。Tegra3啥意思呢： 5个都是40nm的Cortex－A9。其中一个（叫做援交芯片［companion core］是通过40nm的Lower－Power工艺做的silicon[500MHz then］。其他4个Cortex－A9是40nm的标准工艺，可以是1.4GHz/1.3GHz. 换言之，5个哥们，其中4个可以高负荷的工作，生命的燃烧当然比较厉害；比较耗电。其中一个比较enjoy life一点；工作频率慢一倍。。。

在与ARM的Big－Little Computing的体系结构比较的时候，要注意： Cortex－A7可以运行在1GHz下。还是很快滴

Tegra 3 (Kal-El) series

• Processor: quad-core ARM Cortex-A9 MPCore, up to 1.4 GHz single-core mode and 1.3 GHz multi-core mode
• 12-Core Nvidia GPU with support for 3D stereo
• Ultra low power GPU mode
• 40 nm process by TSMC
• Video output up to 2560×1600
• NEON vector instruction set
• 1080p MPEG-4 AVC/h.264 40 Mbps High-Profile, VC1-AP and DivX 5/6 video decode
• The Kal-El chip (CPU and GPU) is to be about 5 times faster than Tegra 2

The Tegra 3 is functionally a quad-core processor, but includes a fifth “companion” core. All cores are Cortex-A9s, but the companion core is manufactured with a special low power silicon process. This means it uses less power at low clock rates, but more at higher rates; hence it is limited to 500 MHz. There is also special logic to allow running state to be quickly transferred between the companion core and one of the normal cores. The goal is for a mobile phone or tablet to be able to power down all the normal cores and run on only the companion core, using comparatively little power, during standby mode or when otherwise using little CPU. According to Nvidia, this includes playing music or even video content.
“The lower power consumption is also credited to a smart 40nm process that uses two different classes of silicon – one which is used for low-voltage activities and the other for higher power hungry ones.”

从整体系统而言，5个相同的Cortext－A9的结构是比Arm的Big－Little Computing更有吸引力。OS和应用系统可以更加灵活掌握。
“vSMP includes a fifth CPU core (the “Companion” core) built using a special low power silicon process that executes tasks at low frequency for active standby mode, music playback, and even video playback. The four main “quad” cores are built using a standard silicon process to reach higher frequencies, while consuming lower power than dual core solutions for many tasks. All five CPU cores are identical ARM Cortex A9 CPUs, and are individually enabled and disabled (via aggressive power gating) based on the work load. The “Companion” core is OS transparent, unlike current Asynchronous SMP architectures, meaning the OS and applications are not aware of this core, but automatically take advantage of it. This strategy saves significant software efforts and new coding requirements.”

下面是NVIDIA的两个非常好的White Paper。对其vSMP结构有比较完整的描述。

分享